IP101GA / GR / GRI

10/100Mbps IEEE 802.3/802.3u compliant Fast Ethernet transceiver
Supports 100Base-TX/FX Media Interface
Supports MII/ RMII Interface
Supports Auto MDI/MDIX function
Power Management Tool
APS, auto power saving while Link-off
802.3az, protocol based power saving
WOL+, light traffic power saving
PWD, force-off power saving
Supports MII with LPI for RX and TX
Supports RMII with LPI for RX
Supports RMII with LPI for RX
Supports Base Line Wander compensation
Supports Interrupt function
Built in synchronization FIFO to support jumbo frame size up to 12KB in MII mode (10KB in RMII 100Mbps mode)
Supports MDC and MDIO to communicate with the MAC
EMI Management Tool
F/W based control
4 levels for mapping the difference layout length on the PCB
Single 3.3V power supply
Built-in Vcore regulator
DSP-based PHY Transceiver technology
System Debug Assistant Tool
16 bit RX counter
9 bit RXError/CRC counter
Isolate MII/RMII
RX to TX Loopback
Loopback MII/RMII
Using either 25MHz crystal/oscillator or 50MHz oscillator REF_CLK as clock source
Built-in 49.9ohm resistors for simplifying BOM
Flexible LED display
Process: 85nm
Package and Operating Temperature
IP101G: dice, 0~70°C
IP101GA: 48LQFP, 0~70°C
IP101GR: 32QFN, 0~70°C
IP101GRI: 32QFN, -40~85°C
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