這PXIe國(guó)家儀器-8830MC(零件號(hào):783564-33)是一個(gè)多計(jì)算處理模塊英特爾酷睿i7處理器支持至少兩個(gè)框架利用PCI Express創(chuàng)新進(jìn)行信息交換。由于該模塊配有英特爾四核處理器鎳PXIe-8830MC可能與PXI邊緣快車的開(kāi)幕有關(guān)。它繼續(xù)在LabVIEW實(shí)時(shí)操作系統(tǒng)上運(yùn)行，并可以作為一個(gè)協(xié)處理器來(lái)減少框架中主要植入控制器的處理。

這PXIe-8830MC在協(xié)處理模塊和主CPU之間提供5 μs的完全延遲，2個(gè)USB 2.0端口和1個(gè)千兆以太網(wǎng)LAN端口，用于信息交換的假設(shè)傳輸容量超過(guò)4 GB/s，4 GB單通道和1600 MHz，以及4個(gè)物理中心和8個(gè)合法中心。

盡管諸如半導(dǎo)體測(cè)試系統(tǒng)(STS)之類的半導(dǎo)體測(cè)試框架不消耗大量的信息集合，但是它們確實(shí)需要并行地花費(fèi)大量的信息集合來(lái)構(gòu)建它們的測(cè)試執(zhí)行或者每小時(shí)一個(gè)部分。測(cè)試框架的并行測(cè)試評(píng)估(PTE)是多站點(diǎn)測(cè)試執(zhí)行的有力支持者，它通常由框架來(lái)編排。盡管如此，對(duì)于像STS這樣的隱蔽方法來(lái)說(shuō)，包含八中心英特爾至強(qiáng)處理器和強(qiáng)大的多中心測(cè)試官方編程(如TestStand)的能力提供了一種謹(jǐn)慎的方法來(lái)處理不斷擴(kuò)展的PTE，并以這種方式為半導(dǎo)體測(cè)試工程師提供了一代吞吐量。

盡管有重要的使用領(lǐng)域，但的機(jī)箱和控制器鎳PXIe-8830MC非常適合任何高傳輸速度或計(jì)算評(píng)估和測(cè)試應(yīng)用，以及任何必須在不放棄執(zhí)行的情況下擴(kuò)展到未來(lái)的應(yīng)用。

The National Instruments PXIe-8830MC (Part Number: 783564-33) is a MultiComputing Processing Module with an Intel Core i7 processor that enables at least two frameworks to trade information utilizing PCI Express innovation. Since this module has an Intel quad-core processor, the NI PXIe-8830MC can be associated with any fringe PXI Express opening. It keeps running on the LabVIEW Real-Time OS and can go about as a coprocessor to lessen the handling of the primary implanted controller in the framework.

The PXIe-8830MC offers 5 μs of complete latency among co-processing module and the principal CPU, 2 USB 2.0 ports with 1 Gigabit Ethernet LAN ports, more than 4 GB/s of hypothetical transmission capacity for information exchange, 4 GB of single-channel with 1600 MHz, and 4 physical and 8 legitimate centers.

Although semiconductor test frameworks such as the Semiconductor Test System (STS) do not consume vast informational collections, they do need to expend numerous informational collections in parallel to build their test execution or one section for each hour. An awesome supporter of the execution of the multi-site test is the parallel test evaluation (PTE) of a test framework, which is commonly orchestrated by a framework. Be that as it may, for a secluded approach like STS, the capacity to include an eight-center Intel Xeon processor and great multi-center test official programming, such as TestStand, gives a prudent way to deal with expanding PTE and, in this way, generation throughput for semiconductor test engineers.

Notwithstanding the key regions of use, the chassis and controller of the NI PXIe-8830MC are perfect for any substantial transfer speed or computational estimation and testing application, as well as any application that must scale into the future without abandoning execution.